Class

chisel3.core

ImplicitModule

Related Doc: package core

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abstract class ImplicitModule extends UserModule

Abstract base class for Modules, which behave much like Verilog modules. These may contain both logic and state which are written in the Module body (constructor).

Note

Module instantiations must be wrapped in a Module() call.

Linear Supertypes
UserModule, BaseModule, HasId, InstanceId, AnyRef, Any
Known Subclasses
Type Hierarchy
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Inherited
  1. ImplicitModule
  2. UserModule
  3. BaseModule
  4. HasId
  5. InstanceId
  6. AnyRef
  7. Any
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Visibility
  1. Public
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Instance Constructors

  1. new ImplicitModule()(implicit moduleCompileOptions: CompileOptions)

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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): iodef.type

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    This must wrap the datatype used to set the io field of any Module.

    This must wrap the datatype used to set the io field of any Module. i.e. All concrete modules must have defined io in this form: [lazy] val io[: io type] = IO(...[: io type])

    Items in [] are optional.

    The granted iodef WILL NOT be cloned (to allow for more seamless use of anonymous Bundles in the IO) and thus CANNOT have been bound to any logic. This will error if any node is bound (e.g. due to logic in a Bundle constructor, which is considered improper).

    Also registers a Data as a port, also performing bindings. Cannot be called once ports are requested (so that all calls to ports will return the same information). Internal API.

    TODO(twigg): Specifically walk the Data definition to call out which nodes are problematic.

    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _autoWrapPorts(): Unit

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    Compatibility function.

    Compatibility function. Allows Chisel2 code which had ports without the IO wrapper to compile under Bindings checks. Does nothing in non-compatibility mode.

    Should NOT be used elsewhere. This API will NOT last.

    TODO: remove this, perhaps by removing Bindings checks in compatibility mode.

    Definition Classes
    BaseModule
  6. var _closed: Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule
  7. def annotate(annotation: ChiselAnnotation): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule
  8. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any
  9. val clock: Clock

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  10. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  11. val compileOptions: CompileOptions

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    Definition Classes
    UserModule
  12. def desiredName: String

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    Desired name of this module.

    Desired name of this module. Override this to give this module a custom, perhaps parametric, name.

    Definition Classes
    BaseModule
  13. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  14. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any
  15. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  16. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any
  17. def getCommands: Seq[Command]

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    Attributes
    protected
    Definition Classes
    UserModule
  18. def getIds: Seq[HasId]

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    Attributes
    protected
    Definition Classes
    BaseModule
  19. def getModulePorts: Seq[Data]

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    Attributes
    protected
    Definition Classes
    BaseModule
  20. lazy val getPorts: Seq[Port]

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    Definition Classes
    UserModule
  21. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any
  22. def instanceName: String

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    Signal name (for simulation).

    Signal name (for simulation).

    Definition Classes
    BaseModule → HasId → InstanceId
  23. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any
  24. final val name: String

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    Legalized name of this module.

    Legalized name of this module.

    Definition Classes
    BaseModule
  25. def nameIds(rootClass: Class[_]): HashMap[HasId, String]

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    Called at the Module.apply(...) level after this Module has finished elaborating.

    Called at the Module.apply(...) level after this Module has finished elaborating. Returns a map of nodes -> names, for named nodes.

    Helper method.

    Attributes
    protected
    Definition Classes
    BaseModule
  26. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  27. final def notify(): Unit

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    Definition Classes
    AnyRef
  28. final def notifyAll(): Unit

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    Definition Classes
    AnyRef
  29. def parentModName: String

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    Definition Classes
    HasId → InstanceId
  30. def parentPathName: String

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    Definition Classes
    HasId → InstanceId
  31. def pathName: String

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    Definition Classes
    HasId → InstanceId
  32. def portsContains(elem: Data): Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule
  33. def portsSize: Int

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    Attributes
    protected
    Definition Classes
    BaseModule
  34. val reset: Reset

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  35. def suggestName(name: ⇒ String): ImplicitModule.this.type

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    Definition Classes
    HasId
  36. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef
  37. def toString(): String

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    Definition Classes
    AnyRef → Any
  38. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  39. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  40. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from UserModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped