Author Archives: Jim Lawson

chisel 3.0.0-RC1

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We would like to announce the preliminary 3.0.0-RC1 release of Chisel3.  Chisel3 is the Chisel version used by the RISC-V Rocket Chip Generator and is what we will be supporting and developing moving forward.  As such, we highly encourage you all to move over to it.  In order to do so, please import chisel3._ instead […]


Chisel v2.2.38 release

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Chisel 2.2.38 was released on 4/24/2017. This is a maintenance release containing general support for the chisel3 asSInt, asUint, toSInt, and toUInt methods.


Chisel v2.2.37 release

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Chisel 2.2.37 was released on 2/23/2017. This is a maintenance release, addressing issue #740, unable to create a ROM with datawidth more than 64 bits.  


Chisel v2.2.35 release

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Chisel 2.2.35 was released on 7/22/2016. This is a maintenance release, addressing issue #718, broken Vec.fill()  


Chisel v2.2.34 release

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Chisel 2.2.34 was released on 7/1/2016. This is primarily a maintenance release.


Chisel v2.2.33 release

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Chisel 2.2.33 was released on 4/14/2016. This is primarily a maintenance release.


Chisel v2.2.32 release

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Chisel v2.2.32 was released on 2/10/2016. In addition to several bug fixes, this versions adds support for two Chisel3-style testers-as-hardware. Please see the ReleaseNotes for details.


Chisel v2.2.31 release

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Chisel 2.2.31 was released on 12/03/2015. This is primarily a maintenance release.


Chisel v2.2.30 release

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Chisel v2.2.30 was released on 10/22/2015. In addition to several bug fixes, this version replaces the stdio serial tester interface with a memory mapped one. Please see the ReleaseNotes for details.  


Chisel v2.2.29 release

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Chisel v2.2.29 was released on 9/30/2015. In addition to many bug fixes, this version adds support for gate-level simulation, to facilitate energy modeling and fault injection. Please see the ReleaseNotes for details.