Chisel 2.0 Bootcamp

Date: September 30, 2013

Location: Sutardja Dai Hall

The main objective of the Chisel bootcamp is to get groups started using the Chisel hardware design infrastructure and to learn about the 2.0 version. In the bootcamp, we will describe the language features, and also how to generate fast C++ cycle simulations, Verilog for FPGA emulation, and Verilog for ASIC synthesis. Due to time and licence issues, we will focus on the C++ simulator backend for the workshop, though are happy to support groups who also want to integrate the Verilog output into their hardware design flows.


Please register by Thursday, Sept 26, 2013. The bootcamp will be free for all faculty, students, federal employees, federal lab employees, and employees of ASPIRE industrial sponsors and affiliates. It will be $100 for all other registrants, payable upon arrival by check or money order to "UC Regents". (Registration fees are non-refundable).

Tentative Agenda

8:30amBreakfastSD Foyer
9:00amWelcome & IntroductionKrste Asanovic
9:15amTutorial Part IJonathan Bachrach
10:30amBreakSD Foyer
11:00amTutorial Part IIJonathan Bachrach
12:30pmLunchSD Foyer
2:00pmHands-on Lab Time
4:00pmFeedback and Discussion
5:00pmOfficial End
5:30pmUnofficial Drinks/FoodJupiter

Laptop preparation

You will need a modern laptop with WIFI and ssh. If you want you can run chisel from VirtualBox using these instructions. You must do this installation before the bootcamp. Otherwise, we will provide you with an account on a cluster running a Chisel virtual machine.


Driving directions: From the airport, head on 101 North to San Francisco, then follow signs to 80E/Bay Bridge. After bridge, stay in left lanes and follow signs to Berkeley on 80. Take University Ave exit, and head towards campus.

Public transit: Take BART from the airport, to the Downtown Berkeley station.

Hotel recommendations: Hotel Shattuck has been recently renovated and is only a block from the Downtown Berkeley BART station. About 15 minutes walk to Sutardja Dai Hall.