Date: September 30, 2013
Location: Sutardja Dai Hall
The main objective of the Chisel bootcamp is to get groups started using the Chisel hardware design infrastructure and to learn about the 2.0 version. In the bootcamp, we will describe the language features, and also how to generate fast C++ cycle simulations, Verilog for FPGA emulation, and Verilog for ASIC synthesis. Due to time and licence issues, we will focus on the C++ simulator backend for the workshop, though are happy to support groups who also want to integrate the Verilog output into their hardware design flows.
|9:00am||Welcome & Introduction||Krste Asanovic|
|9:15am||Tutorial Part I||Jonathan Bachrach|
|11:00am||Tutorial Part II||Jonathan Bachrach|
|2:00pm||Hands-on Lab Time|
|4:00pm||Feedback and Discussion|
Driving directions: From the airport, head on 101 North to San Francisco, then follow signs to 80E/Bay Bridge. After bridge, stay in left lanes and follow signs to Berkeley on 80. Take University Ave exit, and head towards campus.
Public transit: Take BART from the airport, to the Downtown Berkeley station.
Hotel recommendations: Hotel Shattuck has been recently renovated and is only a block from the Downtown Berkeley BART station. About 15 minutes walk to Sutardja Dai Hall.