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object Mux2Cell

Utility for constructing 2-to-1 MUX cell intrinsic. This intrinsic is lowered into verilog with vendor specic pragmas that guarantee utilization of 2-to-1 MUX cell in the synthesis process. Semantically Mux2Cell(cond, con, alt) is equivalent to Mux(cond, con, alt) for all cond, con and alt.

Source
Synthesis.scala
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  4. def apply[T <: Data](cond: UInt, con: T, alt: T): T

    Creates an intrinsic which will be lowered to a 2-to-1 MUX cell in synthesis tools.

    Creates an intrinsic which will be lowered to a 2-to-1 MUX cell in synthesis tools.

    cond

    condition determining the input to choose

    con

    the value chosen when cond is true

    alt

    the value chosen when cond is false

    Example:

    1. val muxOut = Mux2Cell(data_in === 3.U, 3.U(4.W), 0.U(4.W))
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